The figure of merit in thin film transistors (TFTs) is defined by μV/L2 where μ is the mobility, V is the voltage and L is the gate length. The voltage is constrained by the cost of the driver. There are two major problems in flexible TFT technology. The first problem stems from the fact that semiconductor material that can be used in TFTs is severely limited by the maximum temperatures to which flexible substrates can be subjected, i.e. approximately 200° C. This limitation of fabrication temperatures generally results in low mobility of semiconductor material. This problem is partially remedied by the recent advance in metal oxide semiconductor materials in which mobility is as high as 80 cm2/V-sec has been demonstrated. The second problem is the long gate length. Even though lithography resolution on flexible substrates can be as low as 5 microns, the gate length has to be much larger in order to ensure a minimum overlap between the gate and the source/drain. The gate metal and the source/drain metal are defined in separate lithography steps and the alignment between them is critical. Due to the deformation of flexible substrates during fabrication, perfect alignment is difficult. In order to ensure the required overlap, the gate length has to be oversized. But the large resulting overlap between the gate and the source/drain creates a large overlap capacitance that seriously degrades the speed performance of the device. A self-aligned technology is needed to ensure that the gate and source/drain are properly aligned with minimum overlap.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide new and improved methods of fabricating self-aligned metal oxide TFTs on flexible substrates.
It is another object of the present invention to provide new and improved methods of fabricating metal oxide TFTs on flexible substrates using a minimum of process steps.